标题:Thermal-Aware On-Chip Memory Architecture Exploration
作者:Li, Yang; Ju, Lei; Jia, Zhiping; Wang, Yi; Shao, Zili
通讯作者:Jia, ZP
作者机构:[Li, Yang; Ju, Lei; Jia, Zhiping] Shandong Univ, Sch Comp Sci & Technol, Jinan 250100, Peoples R China.; [Wang, Yi; Shao, Zili] Hong Kong Polytech U 更多
会议名称:12th IEEE International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom)
会议日期:JUL 16-18, 2013
来源:2013 12TH IEEE INTERNATIONAL CONFERENCE ON TRUST, SECURITY AND PRIVACY IN COMPUTING AND COMMUNICATIONS (TRUSTCOM 2013)
出版年:2013
页码:1386-1393
DOI:10.1109/TrustCom.2013.167
关键词:Thermal-aware management; on-chip memory optimization; design; exploration; embedded systems
摘要:The memory architecture has the huge impact on the performance of embedded systems. Most of the current on-chip memory techniques focused on the optimization of timing performance, power consumption, and area. Thermal issue of memory subsystem has not been fully considered in these techniques. For on-chip memory architectures, the high temperature may cause the exponential increase of leakage, which becomes one of the major factors of power consumption. With the shrinkage of feature size and the great demand of silicon area, on-chip memory is the dominate contributor of the total leakage. Therefore, it is a challenging issue to manage the thermal cost of the on-chip memory architectures. In this paper, we focus on the optimization of the on-chip memory architecture that consists of cache and scratchpad memory (SPM). Our objective is to optimize the thermal behavior of the memory components for a target application with loops, while keeping the timing performance. We propose a thermal-aware memory architecture exploration algorithm TAME, and a thermal-aware data allocation algorithm TADA. These two algorithms collaborate to perform the memory architecture exploration, considering memory components' type, size, power, area and timing performance. Experimental results show that our method reduces the peak temperature of on-chip memory subsystem significantly, and at the same time the timing performance is even improved by making fully use of SPM.
收录类别:CPCI-S
WOS核心被引频次:2
资源类型:会议论文
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