标题:Design of variable length code decoder for AVS based on FPGA
作者:Li, Shenghong ;Wang, Zuqiang ;Jiang, Xia
通讯作者:Wang, Z
作者机构:[Li, Shenghong ;Wang, Zuqiang ;Jiang, Xia ] Department of Information Science and Engineering, Shandong University, Jinan 250100, Shandong, China
会议名称:2013 IEEE 3rd International Conference on Information Science and Technology, ICIST 2013
会议日期:23 March 2013 through 25 March 2013
来源:2013 IEEE 3rd International Conference on Information Science and Technology, ICIST 2013
出版年:2013
页码:1155-1158
DOI:10.1109/ICIST.2013.6747741
摘要:Aiming at the AVS standard which is the audio and video standard of China, an optimized variable length code decoder is proposed for the AVS standard. The design uses an innovative circular shifter to improve decoding parallelism. It optimizes the VLC tables and uses combinational look-up table circuit to avoid memory access. Self-adaptive pipeline technique is adopted to improve decoding speed. The design has been described in Verilog HDL at RTL level, simulated and tested in ModelSim, synthesized and validated on the FPGA chip. The simulation and verification indicates that the decoder can reach the requirement of AVS video decoding. © 2013 IEEE.
收录类别:EI;SCOPUS
资源类型:会议论文;期刊论文
原文链接:https://www.scopus.com/inward/record.uri?eid=2-s2.0-84898977663&doi=10.1109%2fICIST.2013.6747741&partnerID=40&md5=36347ff403b46b6c249e30cea5359950
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